Integration Of I2C Communication Protocol In Open Power Processor-Based Fabless Soc
DOI:
https://doi.org/10.70135/seejph.vi.6753Abstract
The Inter-Integrated Circuit (I2C) protocol is a widely used two-wire, half-duplex communication interface that enables short-distance data transfer between a master device and one or more slave devices. I2C is commonly employed for interfacing low-speed peripherals such as sensors and real- time clocks in embedded systems. This paper focuses on the integration of the I2C protocol with open power A2O core- based fabless SOC through AXI4 interface. The integration aims to facilitate efficient data exchange between the A2O processor and various peripherals with minimal processor intervention. A hardware-software co-design methodology combines Verilog HDL for hardware development and C programming for software control. The physical implementation ensures reliable commu- nication over the SCL (Serial Clock) and SDA (Serial Data) lines. The Integration and verifying an I2C controller can be created by using Verilog. Simulation and functional validation are conducted using industry-standard tools, including Mentor Graphics Questa® and Xilinx Vivado.
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